Journal Articles
Young, C., H. Olufowobi, G. Bloom, and J. Zambreno,
"Survey of Automotive Controller Area Network Intrusion Detection Systems",
IEEE Design and Test, vol. 36, issue 6, December, 2019.
YouOlu19B.pdf (900.2 KB) Pande, A., and J. Zambreno,
"The Secure Wavelet Transform",
Springer Journal of Real-Time Image Processing (RTIP), 2010.
PanZam10C.pdf (1.13 MB) Olufowobi, H., C. Young, J. Zambreno, and G. Bloom,
"SAIDuCANT: Specification-based Automotive Intrusion Detection using Controller Area Network (CAN) Timing",
IEEE Transactions on Vehicular Technology, vol. 69, issue 2, February, 2020.
OluYou19A.pdf (1.22 MB) Ezeobi, U., H. Olufowobi, C. Young, J. Zambreno, and G. Bloom,
"Reverse Engineering Controller Area Network Messages using Unsupervised Machine Learning",
IEEE Consumer Electronics Magazine, vol. 11, issue 1, January, 2022.
EzeOlu20A.pdf (1015.41 KB) Attia, O., K. Townsend, P. Jones, and J. Zambreno,
"A Reconfigurable Architecture for the Detection of Strongly Connected Components",
ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 9, issue 2, December, 2015.
AttTow15A.pdf (1.33 MB) Monga, M., D. Roggow, M. Karkee, S. Sun, L K. Tondehal, B. Steward, A. Kelkar, and J. Zambreno,
"Real-time Simulation of Dynamic Vehicle Models using a High-performance Reconfigurable Platform",
Microprocessors and Microsystems, vol. 39, issue 8, pp. 720-740, 2015.
MonRog15A.pdf (3.21 MB) Nelson, C., K. Townsend, O. Attia, P. Jones, and J. Zambreno,
"RAMPS: A Reconfigurable Architecture for Minimal Perfect Sequencing",
IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 27, issue 10, 2016.
NelTow16A.pdf (1.19 MB) Baumgarten, A., A. Tyagi, and J. Zambreno,
"Preventing Integrated Circuit Piracy using Reconfigurable Logic Barriers",
IEEE Design and Test of Computers, vol. 27, no. 1, pp. 66-75, January, 2010.
BauTya10A.pdf (730.97 KB) Sun, S., M. Monga, P. Jones, and J. Zambreno,
"An I/O Bandwidth-Sensitive Sparse Matrix-Vector Multiplication Engine on FPGAs",
IEEE Transactions on Circuits and Systems-I (TCAS-I), vol. 59, no. 1, pp. 113-123, 2012.
SunMon12A.pdf (840.43 KB) Kumar, C., S. Vyas, R. Cytron, C. Gill, J. Zambreno, and P. Jones,
"Hardware-Software Architecture for Priority Queue Management in Real-time and Embedded Systems",
International Journal of Embedded Systems (IJES), vol. 6, no. 4, pp. 319-334, 2014.
KumVya13B.pdf (868.27 KB) Pande, A., S. Chen, P. Mohapatra, and J. Zambreno,
"Hardware Architecture for Video Authentication using Sensor Pattern Noise",
IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), vol. 24, no. 1, pp. 157-167, 2014.
PanChe13A.pdf (9.94 MB) Vyas, S., A. Gupte, C. Gill, R. Cytron, J. Zambreno, and P. Jones,
"Hardware Architectural Support for Control Systems and Sensor Processing",
ACM Transactions on Embedded Computing Systems (TECS), vol. 13, no. 2, 2013.
VyaGup13A.pdf (9.27 MB) Vyas, S., C. Kumar, J. Zambreno, C. Gill, R. Cytron, and P. Jones,
"An FPGA-based Plant-on-Chip Platform for Cyber-Physical System Analysis",
IEEE Embedded Systems Letters (ESL), vol. 6, no. 1, pp. 4-7, 2014.
VyaKum13A.pdf (691.9 KB) Johnson, T., D. Roggow, P. Jones, and J. Zambreno,
"An FPGA Architecture for the Recovery of WPA/WPA2 Keys",
Journal of Circuits, Systems, and Computers (JCSC), vol. 24, issue 7, 2015.
JohRog15A.pdf (1.42 MB) Gupte, A., S. Vyas, and P. Jones,
"A Fault-aware Toolchain Approach for FPGA Fault Tolerance",
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 20, no. 2, 2015.
GupVya15A.pdf (6.71 MB) Pande, A., and J. Zambreno,
"Efficient Mapping and Acceleration of AES on Custom Multi-Core Architectures",
Concurrency and Computation: Practice and Experience, vol. 23, no. 4, pp. 372-389, 2011.
PanZam11A.pdf (541.26 KB) Sun, S., and J. Zambreno,
"Design and Analysis of a Reconfigurable Platform for Frequent Pattern Mining",
IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 22, no. 9, pp. 1497-1505, September, 2011.
SunZam11A.pdf (916.97 KB) Sun, S., J. Yan, and J. Zambreno,
"Demonstrable Differential Power Analysis Attacks on Real-World FPGA-Based Embedded Systems",
Integrated Computer-Aided Engineering, vol. 16, no. 2, pp. 119-130, April, 2009.
Pande, A., J. Zambreno, and P. Mohapatra,
"Comments on 'Arithmetic Coding as a Non-Linear Dynamical System'",
Communications in Nonlinear Science and Numerical Simulation (CNSNS), vol. 17, no. 12, pp. 4536-4543, 2012.
PanZam12B.pdf (475.31 KB) Baumgarten, A., M. Steffen, M. Clausman, and J. Zambreno,
"A Case Study in Hardware Trojan Design and Implementation",
International Journal of Information Security (IJIS), vol. 10, no. 1, pp. 1-14, 2011.
BauSte10A.pdf (751.72 KB) Qasaimeh, M., K. Denolf, A. Khodamoradi, M. Blott, J. Lo, L. Halder, K. Vissers, J. Zambreno, and P. Jones,
"Benchmarking Vision Kernels and Neural Network Inference Accelerators on Embedded Platforms",
Journal of Systems Architecture, vol. 113, February, 2021.
QasDen20A.pdf (671.95 KB) Sathre, J., and J. Zambreno,
"Automated Software Attack Recovery using Rollback and Huddle",
Springer Journal of Design Automation for Embedded Systems (DAES), vol. 12, no. 3, pp. 243-260, September, 2008.
SatZam08A.pdf (962.78 KB)