Export 7 results:
Filters: First Letter Of Title is F and Author is Joseph Zambreno  [Clear All Filters]
2023
Welte, B., and J. Zambreno, "An FPGA Implementation of SipHash", Proceedings of the Reconfigurable Architectures Workshop (RAW), May, 2023. PDF icon WelZam23A.pdf (608.81 KB)
2022
Bertram, J., P. Wei, and J. Zambreno, "A Fast Markov Decision Process based Algorithm for Collision Avoidance in Urban Air Mobility", IEEE Transactions on Intelligent Transportation Systems (T-ITS), vol. 23, issue 9, September, 2022. PDF icon BerWei22A.pdf (1.64 MB)
2018
Avey, J., P. Jones, and J. Zambreno, "An FPGA-based Hardware Accelerator for Iris Segmentation", Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), December, 2018. PDF icon AveJon18A.pdf (4.41 MB)
2015
Johnson, T., D. Roggow, P. Jones, and J. Zambreno, "An FPGA Architecture for the Recovery of WPA/WPA2 Keys", Journal of Circuits, Systems, and Computers (JCSC), vol. 24, issue 7, 2015. PDF icon JohRog15A.pdf (1.42 MB)
2014
Wang, X., and J. Zambreno, "An FPGA Implementation of the Hestenes-Jacobi Algorithm for Singular Value Decomposition", Proceedings of the Reconfigurable Architectures Workshop (RAW), May, 2014. PDF icon WanZam14A.pdf (919.75 KB)
Vyas, S., C. Kumar, J. Zambreno, C. Gill, R. Cytron, and P. Jones, "An FPGA-based Plant-on-Chip Platform for Cyber-Physical System Analysis", IEEE Embedded Systems Letters (ESL), vol. 6, no. 1, pp. 4-7, 2014. PDF icon VyaKum13A.pdf (691.9 KB)
2009
Sun, S., and J. Zambreno, "A Floating-point Accumulator for FPGA-based High Performance Computing Applications", Proceedings of the International Conference on Field-Programmable Technology (FPT), December, 2009. PDF icon SunZam09A.pdf (259.63 KB)