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Nelson, C., K. Townsend, O. Attia, P. Jones, and J. Zambreno, "RAMPS: A Reconfigurable Architecture for Minimal Perfect Sequencing", IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 27, issue 10, 2016. PDF icon NelTow16A.pdf (1.19 MB)
Attia, O., K. Townsend, P. Jones, and J. Zambreno, "A Reconfigurable Architecture for the Detection of Strongly Connected Components", ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 9, issue 2, December, 2015. PDF icon AttTow15A.pdf (1.33 MB)
Wang, X., P. Jones, and J. Zambreno, "A Reconfigurable Architecture for QR Decomposition Using A Hybrid Approach", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2014. PDF icon WanZam14C.pdf (600.58 KB)
Qasaimeh, M., J. Zambreno, and P. Jones, "A Runtime Configurable Hardware Architecture for Computing Histogram-based Feature Descriptors", Proceedings of the International Symposium on Field-Programmable Logic and Applications (FPL), August, 2018. PDF icon QasZam18A.pdf (661.47 KB)