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Vyas, S., A. Gupte, C. Gill, R. Cytron, J. Zambreno, and P. Jones, "Hardware Architectural Support for Control Systems and Sensor Processing", ACM Transactions on Embedded Computing Systems (TECS), vol. 13, no. 2, 2013. PDF icon VyaGup13A.pdf (9.27 MB)
Kumar, C., S. Vyas, R. Cytron, C. Gill, J. Zambreno, and P. Jones, "Hardware-Software Architecture for Priority Queue Management in Real-time and Embedded Systems", International Journal of Embedded Systems (IJES), vol. 6, no. 4, pp. 319-334, 2014. PDF icon KumVya13B.pdf (868.27 KB)
Townsend, K., P. Jones, and J. Zambreno, "A High Performance Systolic Architecture for k-NN Classification", Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE), October, 2014. PDF icon TowJon14A.pdf (152.72 KB)
Gupte, A., and P. Jones, "Hotspot Mitigation using Dynamic Partial Reconfiguration for Improved Performance", Proceedings of the International Conference on Reconfigurable Computing and FPGAs (Reconfig), December, 2009. PDF icon GupJon09B.pdf (404.56 KB)
Cauwels, M., J. Zambreno, and P. Jones, "HW/SW Configurable LQG Controller using a Sequential Discrete Kalman Filter", Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), December, 2018. PDF icon CauZam18A.pdf (682.52 KB)