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A
Saha, S., H. Duwe, and J. Zambreno, "An Adaptive Memory Management Strategy Towards Energy Efficient Machine Inference in Event-Driven Neuromorphic Accelerators", Proceedings of the International Conference on Application-specific Systems, Architectures and Processors (ASAP), July, 2019. PDF icon SahDuwe19A.pdf (900.9 KB)
Grieve, A., M. Davies, P. Jones, and J. Zambreno, "ARMOR: A Recompilation and Instrumentation-free Monitoring Architecture for Detecting Memory Exploits", IEEE Transactions on Computers (TC), vol. 67, issue 8, 2018. PDF icon GriDav18A.pdf (1.42 MB)
B
Qasaimeh, M., K. Denolf, A. Khodamoradi, M. Blott, J. Lo, L. Halder, K. Vissers, J. Zambreno, and P. Jones, "Benchmarking Vision Kernels and Neural Network Inference Accelerators on Embedded Platforms", Journal of Systems Architecture, vol. 113, February, 2021. PDF icon QasDen20A.pdf (671.95 KB)
C
Qasaimeh, M., K. Denolf, J. Lo, K. Vissers, J. Zambreno, and P. Jones, "Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels", Proceedings of the IEEE International Conference on Embedded Software and Systems (ICESS), June, 2019. PDF icon QasDen19A.pdf (298.85 KB)
Saha, S., H. Duwe, and J. Zambreno, "CyNAPSE: A Low-power Reconfigurable Neural Inference Accelerator for Spiking Neural Networks", Journal of Signal Processing Systems, vol. 92, 2020. PDF icon SahDuw20A.pdf (3.98 MB)
M
Patterson, M., A. Mills, R. Scheel, J. Tillman, E. Dye, and J. Zambreno, "A Multi-Faceted Approach to FPGA-Based Trojan Circuit Detection", Proceedings of the IEEE VLSI Test Symposium (VTS), April, 2013. PDF icon PatMil13A.pdf (4.38 MB)