Name | Degree | Year | Thesis Title | Current Employer |
---|---|---|---|---|
Clinton Young | Ph.D. | 2022 | Techniques for Utilizing Classification Towards Securing Automotive Controller Area Network and Machine Learning Towards the Reverse Engineering of CAN Messages | Collins Aerospace |
Matt Dwyer | M.S. | 2022 | GeMM Enabled Batch Ray-Triangle Intersections | NVIDIA |
Ben Welte | M.S. | 2022 | An FPGA implementation of SipHash | Vermeer |
Cristian George | M.S. | 2022 | Towards the Reverse Engineering of DNN Structures on Heterogeneous Shared Cache Systems | IBM |
Pei Zhang | Ph.D. | 2021 | Hardware/Software Frameworks for Control Techniques to Support Real-Time Systems and Runtime Verification |
|
Murad Qasaimeh | Ph.D. | 2020 | Efficient Processing of Vision Kernels and Deep Neural Networks on Reconfigurable Computing Architectures | AMD |
Matthew Cauwels | M.S. | 2019 | A Hardware Scalable, Software Configurable LQG Controller Using a Sequential Discrete Kalman Filter | Vermeer |
Saunak Saha | M.S. | 2019 | Towards Energy-Efficient Hardware Acceleration of Memory-intensive Event-driven Kernels on a Synchronous Neuromorphic Substrate | AMD |
Robert Wernsman | M.S. | 2019 | Analyzing Energy Savings in an FPGA Video Processing System using Dynamic Partial Reconfiguration | Microsoft |
Joseph Avey | M.S. | 2018 | An FPGA-based Hardware Accelerator for Iris Segmentation | Garmin |
Quinn Murphy | M.S. | 2018 | Accelerating Structured Light Surface Reconstruction with Motion Analysis | Garmin |
Mihir Awatramani | Ph.D. | 2017 | Workload-aware Scheduling Techniques for General Purpose Applications on Graphics Processing Units | Nvidia |
Ben Williams | M.S. | 2017 | Evaluation of a SoC for Real-time 3D SLAM | Microsoft |
Dan Roggow | M.S. | 2017 | Real-time Ellipse Detection on an Embedded Reconfigurable SoC | Collins Aerospace |
Alex Grieve | M.S. | 2016 | A Recompilation and Instrumentation-Free Monitoring Architecture for Detecting Heap Memory Errors and Exploits |
John Deere |
Xinying Wang | Ph.D. | 2016 | Using Reconfigurable Computing Technology to Accelerate Matrix Decomposition and Applications | Intel |
Aaron Mills | Ph.D. | 2016 | Design and Implementation of an FPGA-based Piecewise Affine Kalman Filter for Cyber-Physical Systems | MIT Lincoln Laboratory |
Piriya Hall | M.S. | 2016 | Adaptation of a GPU Simulator for Modern Architectures | IBM |
Kevin Townsend | Ph.D. | 2016 | Sparse Matrix Vector Multiplication on FPGA-based Platforms | |
Chetan Kumar | Ph.D. | 2015 | Hardware Architecture Support for Mixed Criticality and Real-Time Systems | Nvidia |
Sudhanshu Vyas | Ph.D. | 2015 | Design Exploration of Hardware Accelerators for Mitigating the Effects of Computational Delay on Digital Control Loops | Northrop Grumman |
Blake Vermeer | M.S. | 2014 | Creating a Releasable Version of ISERink | Keysight |
Matt Hinrichsen | M.S. | 2014 | Reliable Authentication Using the Anderson PUF | Workiva |
Tyler Johnson | M.S. | 2014 | An FPGA Architecture for the Recovery of WPA/WPA2 Keys | Cerner |
Kiran Tondehal | M.S. | 2013 | Optimization of Sparse-Matrix Vector Multiplication on Convey HC-1 | Oracle |
Michael Patterson | M.S. | 2013 | Vulnerability Analysis of GPU Computing | Pillar Technology |
Pooja Mhapsekar | M.S. | 2013 | FPGA-based Acceleration of the RMAP Short Read Mapping Tool | SKHynix |
Moin Sayed | M.S. | 2012 | Mitigating Impacts of Workload Variation on Ring Oscillator-based Thermometers | Broadcom |
Aaron Mills | M.S. | 2012 | Design and Evaluation of a Delay-Based FPGA Physically Unclonable Function | MIT Lincoln Laboratory |
Chad Nelson | M.S. | 2012 | RAMPS: Reconfigurable Architecture for Minimal Perfect Sequencing using the Convey Hybrid Core Computer | Talen-X |
Michael Steffen | Ph.D. | 2012 | A Hardware-Software Integrated Solution for Improved Single-Instruction Multi-Thread Processor Efficiency | AMD |
Song Sun | Ph.D. | 2011 | Analysis and Acceleration of Data Mining Algorithms on High Performance Reconfigurable Computing Platforms | Symantec |
Justin Rilling | M.S. | 2011 | Persistent Monitoring of Digital ICs to Verify Hardware Trust | Rockwell-Collins |
Adwait Gupte | M.S. | 2011 | A Slice Fault Aware Tool Chain for FPGAs | D.E. Shaw |
Amit Pande | Ph.D. | 2010 | Algorithms and Architectures for Secure Embedded Multimedia Systems | UC-Davis |
Madhu Monga | M.S. | 2010 | Real-Time Simulation of Dynamic Vehicle Models using High Performance Reconfigurable Computing Platforms | Intel |
Alex Baumgarten | M.S. | 2009 | Preventing Integrated Circuit Piracy using Reconfigurable Logic Barriers | Uber |
Jesse Sathre | M.S. | 2008 | Architectural Support for Secure and Survivable Software | IBM |