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Zhu, X., M. Awatramani, D. Rover, and J. Zambreno, "ONAC: Optimal Number of Active Cores Detector for Energy Efficient GPU Computing", Proceedings of the International Conference on Computer Design (ICCD), October, 2016. PDF icon ZhuAwa16A.pdf (820.98 KB)
Zhu, X., R. Wernsman, and J. Zambreno, "Improving First Level Cache Efficiency for GPUs Using Dynamic Line Protection", Proceedings of the International Conference on Parallel Processing (ICPP), August, 2018. PDF icon ZhuWer18A.pdf (891.94 KB)
Zhang, P., A. Mills, J. Zambreno, and P. Jones, "The Design and Integration of a Software Configurable and Parallelized Coprocessor Architecture for LQR Control", Journal of Parallel and Distributed Computing (JPDC), vol. 106, pp. 121-131, 2017. PDF icon ZhaMil17A.pdf (2.06 MB)
Zhang, P., A. Mills, J. Zambreno, and P. Jones, "A Software Configurable and Parallelized Coprocessor Architecture for LQR Control", Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), December, 2015. PDF icon ZhaMil15A.pdf (1.29 MB)
Zhang, P., J. Zambreno, and P. Jones, "An Embedded Scalable Linear Model Predictive Hardware-based Controller using ADMM", Proceedings of the International Conference on Application-specific Systems, Architectures and Processors (ASAP), July, 2017. PDF icon ZhaZam17A.pdf (2.5 MB)