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Qasaimeh, M., P. Jones, and J. Zambreno, "A Modified Sliding Window Architecture for Efficient BRAM Resource Utilization", Proceedings of the Reconfigurable Architectures Workshop (RAW), May, 2017. PDF icon QasJon17A.pdf (707.38 KB)
Qasaimeh, M., J. Zambreno, and P. Jones, "A Runtime Configurable Hardware Architecture for Computing Histogram-based Feature Descriptors", Proceedings of the International Symposium on Field-Programmable Logic and Applications (FPL), August, 2018. PDF icon QasZam18A.pdf (661.47 KB)
Qasaimeh, M., K. Denolf, J. Lo, K. Vissers, J. Zambreno, and P. Jones, "Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels", Proceedings of the IEEE International Conference on Embedded Software and Systems (ICESS), June, 2019. PDF icon QasDen19A.pdf (298.85 KB)
Qasaimeh, M., K. Denolf, A. Khodamoradi, M. Blott, J. Lo, L. Halder, K. Vissers, J. Zambreno, and P. Jones, "Benchmarking Vision Kernels and Neural Network Inference Accelerators on Embedded Platforms", Journal of Systems Architecture, vol. 113, February, 2021. PDF icon QasDen20A.pdf (671.95 KB)
Qasaimeh, M., J. Zambreno, and P. Jones, "An Efficient Hardware Architecture for Sparse Convolution using Linear Feedback Shift Registers", Proceedings of the International Conference on Application-specific Systems, Architectures and Processors (ASAP), July, 2021. PDF icon QasZam21A.pdf (1.83 MB)