
@conference {YouSvo20A,
	title = {Towards Reverse Engineering Controller Area Network Messages Using Machine Learning},
	booktitle = {Proceedings of the IEEE World Forum on Internet of Things (WF-IoT)},
	year = {2020},
	month = {April},
	abstract = {The automotive Controller Area Network (CAN) allows Electronic Control Units (ECUs) to communicate with each other and control various vehicular functions such as engine and braking control. Consequently CAN and ECUs are high priority targets for hackers. As CAN implementation details are held as proprietary information by vehicle manufacturers, it can be challenging to decode and correlate CAN messages to specific vehicle operations. To understand the precise meanings of CAN messages, reverse engineering techniques that are time-consuming, manually intensive, and require a physical vehicle are typically used. This work aims to address the process of reverse engineering CAN messages for their functionality by creating a machine learning classifier that analyzes messages and determines their relationship to other messages and vehicular functions. Our work examines CAN traffic of different vehicles and standards to show that it can be applied to a wide arrangement of vehicles. The results show that the function of CAN messages can be determined without the need to manually reverse engineer a physical vehicle.  },
	author = {Clinton Young and Jordan Svoboda and Joseph Zambreno}
}
@conference {YouZam16A,
	title = {Towards a Fail-Operational Intrusion Detection System for In-Vehicle Networks},
	booktitle = {Proceedings of the Workshop on Security and Dependability of Critical Embedded Real-Time Systems (CERTS)},
	year = {2016},
	month = {November},
	abstract = {The landscape of automotive in-vehicle networks is changing driven by the vast options for infotainment features and progress toward fully-autonomous vehicles. However, the security of automotive networks is lagging behind feature-driven technologies, and new vulnerabilities are constantly being discovered. In this paper, we introduce a road map towards a security solution for in-vehicle networks that can detect anomalous and failed states of the network and adaptively respond in real-time to maintain a fail-operational system.},
	author = {Clinton Young and Joseph Zambreno and Gedare Bloom}
}
@conference {MilZam14A,
	title = {Towards Scalable Monitoring and Maintenance of Rechargeable Batteries},
	booktitle = {Proceedings of the IEEE International Conference on Electro/Information Technology (EIT)},
	year = {2014},
	month = {June},
	abstract = {Current research on State-of-Charge (SOC) tracking for rechargeable batteries focuses primarily on analyzing batteries consisting of a single cell, or otherwise treat a set of series-connected cells as a homogeneous unit. Yet, as the number of series-connected cells per battery increase, so does the challenge of ensuring safe and efficient operation over a potentially long period of deployment. Cell-level energy balancing is commonly proposed as a means to address the effects of cell property mismatch. However, no comprehensive solution exists addressing the need to maintain SOC accuracy over the full life of a large battery, while also managing the energy imbalance which develops between cells. If poorly managed, this imbalance can reduce usable capacity and lifespan. This paper proposes an integrated solution to these various issues by tracking SOC on a per-cell basis and applying SOC to a cell-balancing application. The effectiveness is demonstrated using a custom test platform.},
	author = {Aaron Mills and Joseph Zambreno}
}
@conference {SteJon11A,
	title = {Teaching Graphics Processing and Architecture using a Hardware Prototyping Approach},
	booktitle = {Proceedings of the International Conference on Microelectronic Systems Education (MSE)},
	year = {2011},
	month = {June},
	abstract = {Since its introduction over two decades ago, graphics hardware has continued to evolve to improve rendering performance and increase programmability. While most undergraduate courses in computer graphics focus on rendering algorithms and programming APIs, we have recently created an undergraduate senior elective course that focuses on graphics processing and architecture, with a strong emphasis on laboratory work targeting hardware prototyping of the 3D rendering pipeline. In this paper, we present the overall course layout and FPGA-based laboratory infrastructure, that by the end of the semester enables students to implement an OpenGL-compliant graphics processor. To our knowledge, this class is the first that takes a hardware prototyping approach to teaching computer graphics and architecture.},
	author = {Michael Steffen and Phillip Jones and Joseph Zambreno}
}
@conference {GupJon09A,
	title = {Towards Hardware Support for Common Sensor Processing Tasks},
	booktitle = {Proceedings of the International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)},
	year = {2009},
	month = {August},
	abstract = {Sensor processing is a common task within many embedded system domains, such as in control systems sensor feedback used for actuator control, etc. In this paper we have surveyed several embedded system domains, and extracted kernels of computation that are common across applications within a given domain, or across domains. We have shown that adding architectural support for executing these common kernels of computation can yield an overall better system performance. We present a light weight, simplified prototype of a Sensor Processing Unit (SPU) that offloads these computations from the main Arithmetic Logic Unit (ALU) of an embedded processor, and that accesses sensor data in a low latency manner. Our SPU prototype shows an average speed up factor of 2.48 over executing these kernels on an embedded PowerPC processor. A large portion of this speed up is due to our low latency method for accessing sensor data. Isolating our speed up to purely computation still shows an average speed up factor of 1.38 for these kernels.},
	author = {Adwait Gupte and Phillip Jones}
}
