
@article {ZhaMil17A,
	title = {The Design and Integration of a Software Configurable and Parallelized Coprocessor Architecture for LQR Control},
	journal = {Journal of Parallel and Distributed Computing (JPDC)},
	volume = {106},
	year = {2017},
	pages = {121-131},
	abstract = {We present a software configurable and parallelized coprocessor architecture for LQR control that can control physical processes representable by a linear state-space model. Our proposed architecture has distinct advantages over purely software or purely hardware approaches. It differs from other hardware controllers in that it is not hardwired to control one or a small range of plant types (e.g. only electric motors). Via software, an embedded systems engineer can easily reconfigure the controller to suit a wide range of controls applications that can be represented as a state-space model. One goal of our approach is to support a design methodology to help bridge the gap between controls and embedded system software engineering. Control of the well-understood inverted pendulum on a cart is used as an illustrative example of how the proposed hardware accelerator architecture supports our envisioned design methodology for helping bridge this gap. Additionally, we explore the design space of our co-processor{\textquoteright}s parallel architecture in terms of computing speed and resource utilization. Our performance results show a 3.4 to 100 factor speedup over a 666 MHz embedded ARM processor, for plants that can be represented by 4 to 128 states respectively. Finally we describe integration of the controller with the input and output interfaces needed to control a real inverted pendulum. },
	author = {Pei Zhang and Aaron Mills and Joseph Zambreno and Phillip Jones}
}
@conference {MilVya12A,
	title = {Design and Evaluation of a Delay-Based FPGA Physically Unclonable Function},
	booktitle = {Proceedings of the International Conference on Computer Design (ICCD)},
	year = {2012},
	month = {September},
	abstract = {A new Physically Unclonable Function (PUF) variant was developed on an FPGA, and its quality evaluated. It is conceptually similar to PUFs developed using standard SRAM cells, except it utilizes general FPGA reconfigurable fabric, which offers several advantages. Comparison between our approach and other PUF designs indicates that our design is competitive in terms of repeatability within a given instance, and uniqueness between instances. The design can also be tuned to achieve desired response characteristics which broadens the potential range of applications.},
	author = {Aaron Mills and Sudhanshu Vyas and Michael Patterson and Christopher Sabotta and Phillip Jones and Joseph Zambreno}
}
