
@conference {PivJon20A,
	title = {ParaHist: FPGA Implementation of Parallel Event-Based Histogram for Optical Flow Calculation},
	booktitle = {Proceedings of the International Conference on Application-specific Systems, Architectures and Processors (ASAP)},
	year = {2020},
	month = {July},
	abstract = {In this paper, we present an FPGA-based architecture for histogram generation to support event-based camera optical flow calculation.  Our proposed histogram generation mechanism reduces memory and logic resources by storing the time difference between consecutive events, instead of the absolute time of each event. Additionally, we explore the trade-off between system resource usage and histogram accuracy as a function of the precision at which time is encoded.  Our results show that across three event-based camera benchmarks we can reduce the encoding of time from 32 to 7 bits with a loss of only approximately 3\% in histogram accuracy.  In comparison to a software implementation, our architecture shows a significant speedup.},
	author = {Mohammad Pivezhandi and Phillip Jones and Joseph Zambreno}
}
@conference {MilJon16A,
	title = {Parameterizable FPGA-based Kalman Filter Coprocessor Using Piecewise Affine Modeling},
	booktitle = {Proceedings of the Reconfigurable Architectures Workshop (RAW)},
	year = {2016},
	month = {May},
	abstract = {The Kalman Filter is a robust tool often employed as a plant observer in control systems. However, in the general case the high computational cost, especially for large system models or fast sample rates, makes it an impractical choice for typical low-power microcontrollers. Industry trends towards tighter integration and subsystem consolidation point to the use of powerful high-end SoCs, but this complicates the ability for a controls engineer to verify correct behavior of the system under all conditions, which is important in safety-critical systems.

Dedicated FPGA hardware can provide computational speedup, in addition to firmer design partitioning in mixed-criticality systems and fully deterministic timing, which helps ensure a control system behaves as close as possible to offline simulations. We introduce and compare two variants of a software-configurable FPGA-based implementation of a Kalman Filter. The first is an implementation of an Extended Kalman Filter, while the second is a novel approach{\textendash}the Piecewise-Affine Kalman Filter{\textendash}which may offer significant advantages for certain types of applications.

The state estimate update time and resource requirements are analyzed for plant models up to 28 states. For large models, the designs provide a speedup of 7-12x compared to reference ARM9020T software implementations. An application-agnostic performance analysis demonstrates how the Piecewise-Affine Kalman Filter reduces the software workload and the communication overhead compared to the standard mixed hardware-software Extended Kalman Filter approach.},
	author = {Aaron Mills and Phillip Jones and Joseph Zambreno}
}
@conference {RogUhi15A,
	title = {A Project-Based Embedded Systems Design Course Using a Reconfigurable SoC Platform},
	booktitle = {Proceedings of the International Conference on Microelectronic Systems Education (MSE)},
	year = {2015},
	month = {May},
	abstract = {Embedded systems are becoming increasingly complex, as typical system components, such as sensors and other specialized processors, are blended together with more traditional microprocessors to form complex systems-on-chips (SoCs). Teaching undergraduate students to understand concepts and technologies behind embedded systems is important in order to prepare these future engineers with the skills and expertise necessary for designing such complex systems. This paper describes an undergraduate course designed to introduce students to embedded system design concepts and challenges in an engaging and effective manner. Our course uses a combination of in-depth laboratory assignments and topical lectures to provide a unique hands-on education for students. Laboratory assignments utilize Avnet{\textquoteright}s ZedBoard platform, a development board built around Xilinx{\textquoteright}s Zynq-7000 SoC, and require students to solve a variety of embedded system challenges from a range of application domains. Overall, student feedback about the course has been positive.},
	author = {Daniel Roggow and Paul Uhing and Phillip Jones and Joseph Zambreno}
}
