An Efficient Hardware Architecture for Multimedia Encryption and Authentication using the Discrete Wavelet Transform
| Authors | Amit Pande and Joseph Zambreno |
|---|---|
| Type | Conference Paper |
| Published in | Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
| Pages | 85-90 |
| Date | May 2009 |
Abstract
This paper introduces a zero-overhead encryption and authentication scheme for real-time embedded multimedia systems. The parameterized construction of the Discrete Wavelet Transform (DWT) compression block is used to introduce a free parameter in the design. It allows building a keyspace for lightweight multimedia encryption. The parameterization yields rational coefficients leading to an efficient fixed point hardware implementation. A clock speed of over 240 MHz was achieved on a Xilinx Virtex 5 FPGA. Comparison with existing approaches was performed to indicate the high throughput and low hardware overhead in adding the security feature to the DWT architecture.
BibTeX
@conference{PanZam09B,
title = {An Efficient Hardware Architecture for Multimedia Encryption and Authentication using the Discrete Wavelet Transform},
booktitle = {Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
year = {2009},
month = may,
pages = {85-90},
author = {Pande, Amit and Zambreno, Joseph}
}