Preventing Integrated Circuit Piracy using Reconfigurable Logic Barriers
| Authors | Alex Baumgarten, Akhilesh Tyagi, and Joseph Zambreno |
|---|---|
| Type | Journal Article |
| Journal | IEEE Design and Test of Computers |
| Volume | 27 |
| Issue | 1 |
| Pages | 66-75 |
| Date | January 2010 |
Abstract
Hardware metering to prevent IC piracy is a challenging and important problem. The authors propose a combinational locking scheme based on intelligent placement of the barriers throughout the design in which the objective is to maximize the effectiveness of the barriers and to minimize the overhead.
BibTeX
@article{BauTya10A,
title = {Preventing Integrated Circuit Piracy using Reconfigurable Logic Barriers},
journal = {IEEE Design and Test of Computers},
volume = {27},
number = {1},
year = {2010},
month = jan,
pages = {66-75},
author = {Baumgarten, Alex and Tyagi, Akhilesh and Zambreno, Joseph}
}