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Book
A. Pande and J. Zambreno, Embedded Multimedia Security Systems, , London, Springer-Verlag, pp. 146, 2013.  
Conference Papers
J. Sathre, A. Baumgarten and J. Zambreno, "Architectural Support for Automated Software Attack Detection, Recovery, and Prevention", Proceedings of the International Conference on Embedded and Ubiquitous Computing (EUC), August, 2009.  
A. Pande, J. Zambreno and P. Mohapatra, "Architectures for Simultaneous Coding and Encryption using Chaotic Maps", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2011.  
J. Rilling, D. Graziano, J. Hitchcock, T. Meyer, X. Wang, P. Jones and J. Zambreno, "Circumventing a Ring Oscillator Approach to FPGA-Based Hardware Trojan Detection", Proceedings of the International Conference on Computer Design (ICCD), October, 2011.  
A. Pande and J. Zambreno, "Design and Analysis of Efficient Reconfigurable Wavelet Filters", Proceedings of the IEEE International Conference on Electro/Information Technology (EIT), May, 2008.  
A. Mills, S. Vyas, M. Patterson, C. Sabotta, P. Jones and J. Zambreno, "Design and Evaluation of a Delay-Based FPGA Physically Unclonable Function", Proceedings of the International Conference on Computer Design (ICCD), September, 2012.  
M. Steffen and J. Zambreno, "Design and Evaluation of a Hardware Accelerated Ray Tracing Data Structure", Proceedings of Theory and Practice of Computer Graphics (TPCG), June, 2009.  
A. Pande and J. Zambreno, "Design and Hardware Implementation of a Chaotic Encryption Scheme for Real-Time Embedded Systems", Proceedings of the IEEE Signal Processing and Communications Conference (SPCOM), July, 2010.  
H. Chen, S. Sun, D. Aliprantis and J. Zambreno, "Dynamic Simulation of DFIG Wind Turbines on FPGA Boards", Proceedings of the Power and Energy Conference at Illinois (PECI), pp. 39-44, February, 2010.  
H. Chen, S. Sun, D. Aliprantis and J. Zambreno, "Dynamic Simulation of Electric Machines on FPGA Boards", Proceedings of the International Electric Machines and Drives Conference (IEMDC), May, 2009.  
A. Pande and J. Zambreno, "An Efficient Hardware Architecture for Multimedia Encryption and Authentication using the Discrete Wavelet Transform", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 85-90, May, 2009.  
A. Pande and J. Zambreno, "Efficient Translation of Algorithmic Kernels on Large-Scale Multi-Cores", Proceedings of the International Workshop on Reconfigurable and Multicore Embedded Systems (WoRMES), August, 2009.  
S. Sun, J. Yan and J. Zambreno, "Experiments in Attacking FPGA-Based Embedded Systems using Differential Power Analysis", Proceedings of the IEEE International Conference on Electro/Information Technology (EIT), May, 2008.  
M. Steffen and J. Zambreno, "Exposing High School Students to Concurrent Programming Principles using Video Game Scripting Engines", Proceedings of the Annual Conference of the American Society for Engineering Education (ASEE), June, 2012.  
S. Sun and J. Zambreno, "A Floating-point Accumulator for FPGA-based High Performance Computing Applications", Proceedings of the International Conference on Field-Programmable Technology (FPT), December, 2009.  
A. Pande, J. Zambreno and P. Mohapatra, "Hardware Architecture for Simultaneous Arithmetic Coding and Encryption", Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), July, 2011.  
M. Steffen and J. Zambreno, "A Hardware Pipeline for Accelerating Ray Traversal Algorithms on Streaming Processors", Proceedings of the IEEE Symposium on Application Specific Processors (SASP), June, 2010.  
M. Steffen and J. Zambreno, "Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels", Proceedings of the International Symposium on Microarchitecture (MICRO), pp. 237-248, December, 2010.  
C. Kumar, S. Vyas, J. Shidal, R. Cytron, C. Gill, J. Zambreno and P. Jones, "Improving System Predictability and Performance via Hardware Accelerated Data Structures", Proceedings of Dynamic Data Driven Application Systems (DDDAS), June, 2012.  
M. Steffen, P. Jones and J. Zambreno, "Introducing Graphics Processing from a Systems Perspective: A Hardware / Software Approach", Proceedings of the Annual Conference of the American Society for Engineering Education (ASEE), June, 2012.  
A. Pande, J. Zambreno and P. Mohapatra, "Joint Video Compression and Encryption using Arithmetic Coding and Chaos", Proceedings of the IEEE International Conference on Internet Multimedia Systems Architecture and Applications (IMSAA), December, 2010.  
S. Sun and J. Zambreno, "Mining Association Rules with Systolic Trees", Proceedings of the International Conference on Field-Programmable Logic and its Applications (FPL), pp. 143-148, September, 2008.  
M. Patterson, A. Mills, R. Scheel, J. Tillman, E. Dye and J. Zambreno, "A Multi-Faceted Approach to FPGA-Based Trojan Circuit Detection", Proceedings of the IEEE VLSI Test Symposium (VTS), April, 2013.  
A. Pande and J. Zambreno, "Polymorphic Wavelet Architectures using Reconfigurable Hardware", Proceedings of the International Conference on Field-Programmable Logic and its Applications (FPL), pp. 471-474, September, 2008.  
M. Karkee, M. Monga, B. Steward, J. Zambreno and A. Kelkar, "Real-Time Simulation and Visualization Architecture with Field Programmable Gate Array (FPGA) Simulator", Proceedings of the ASME World Conference on Innovative Virtual Reality (WINVR), May, 2010.  
M. Monga, M. Karkee, L K. Tondehal, B. Steward, A. Kelkar and J. Zambreno, "Real-Time Simulation of Dynamic Vehicle Models using a High-performance Reconfigurable Platform", Proceedings of the International Conference on Computational Science (ICCS), June, 2012.  
A. Pande and J. Zambreno, "A Reconfigurable Architecture for Secure Multimedia Delivery", Proceedings of the International Conference on VLSI Design (VLSID), January, 2010.  
S. Sun, M. Steffen and J. Zambreno, "A Reconfigurable Platform for Frequent Pattern Mining", Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), December, 2008.  
K. Townsend and J. Zambreno, "Reduce, Reuse, Recycle (R^3): a Design Methodology for Sparse Matrix Vector Multiplication on Reconfigurable Platforms", Proceedings of the International Conference on Application-specific Systems, Architectures and Processors (ASAP), June, 2013.  
J. Sathre and J. Zambreno, "Rollback and Huddle: Architectural Support for Trustworthy Application Replay", Proceedings of the Workshop on Embedded Software Security (WESS), October, 2007.  
C. Kumar, S. Vyas, R. Cytron, C. Gill, J. Zambreno and P. Jones, "Scheduling Challenges in Mixed Critical Real-time Heterogeneous Computing Platforms", Proceedings of Dynamic Data Driven Application Systems (DDDAS), June, 2013.  
C. Nelson, K. Townsend, B S. Rao, P. Jones and J. Zambreno, "Shepard: A Fast Exact Match Short Read Aligner", Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE), July, 2012.  
M. Steffen, P. Jones and J. Zambreno, "Teaching Graphics Processing and Architecture using a Hardware Prototyping Approach", Proceedings of the International Conference on Microelectronic Systems Education (MSE), June, 2011.  
A. Pande, P. Mohapatra and J. Zambreno, "Using Chaotic Maps for Encrypting Image and Video Content", Proceedings of the International Symposium on Multimedia (ISM), December, 2011.  
Journal Articles
J. Sathre and J. Zambreno, "Automated Software Attack Recovery using Rollback and Huddle", Springer Journal of Design Automation for Embedded Systems (DAES), vol. 12, no. 3, pp. 243-260, September, 2008.  
A. Baumgarten, M. Steffen, M. Clausman and J. Zambreno, "A Case Study in Hardware Trojan Design and Implementation", International Journal of Information Security (IJIS), vol. 10, no. 1, pp. 1-14, 2011.  
A. Pande and J. Zambreno, "A Chaotic Encryption Scheme for Real-time Embedded Systems: Design and Implementation", Telecommunication Systems, In Press.  
A. Pande, J. Zambreno and P. Mohapatra, "Comments on 'Arithmetic Coding as a Non-Linear Dynamical System'", Communications in Nonlinear Science and Numerical Simulation (CNSNS), vol. 17, no. 12, pp. 4536-4543, 2012.  
S. Sun, J. Yan and J. Zambreno, "Demonstrable Differential Power Analysis Attacks on Real-World FPGA-Based Embedded Systems", Integrated Computer-Aided Engineering, vol. 16, no. 2, pp. 119-130, April, 2009.  
S. Sun and J. Zambreno, "Design and Analysis of a Reconfigurable Platform for Frequent Pattern Mining", IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 22, no. 9, pp. 1497-1505, September, 2011.  
A. Pande and J. Zambreno, "Efficient Mapping and Acceleration of AES on Custom Multi-Core Architectures", Concurrency and Computation: Practice and Experience, vol. 23, no. 4, pp. 372-389, 2011.  
S. Vyas, C. Kumar, J. Zambreno, C. Gill, R. Cytron and P. Jones, "An FPGA-based Plant-on-Chip Platform for Cyber-Physical System Analysis", IEEE Embedded Systems Letters (ESL), In Press.  
S. Vyas, A. Gupte, C. Gill, R. Cytron, J. Zambreno and P. Jones, "Hardware Architectural Support for Control Systems and Sensor Processing", ACM Transactions on Embedded Computing Systems (TECS), In Press.  
S. Sun, M. Monga, P. Jones and J. Zambreno, "An I/O Bandwidth-Sensitive Sparse Matrix-Vector Multiplication Engine on FPGAs", IEEE Transactions on Circuits and Systems-I (TCAS-I), vol. 59, no. 1, pp. 113-123, 2012.  
A. Pande and J. Zambreno, "Poly-DWT: Polymorphic Wavelet Hardware Support For Dynamic Image Compression", ACM Transactions on Embedded Computing Systems (TECS), vol. 11, no. 1, 2012.  
A. Baumgarten, A. Tyagi and J. Zambreno, "Preventing Integrated Circuit Piracy using Reconfigurable Logic Barriers", IEEE Design and Test of Computers, vol. 27, no. 1, pp. 66-75, January, 2010.  
A. Pande and J. Zambreno, "Reconfigurable Hardware Implementation of a Modified Chaotic Filter Bank Scheme", International Journal of Embedded Systems (IJES), vol. 10, no. 3, pp. 248--258, 2010.  
A. Pande and J. Zambreno, "The Secure Wavelet Transform", Springer Journal of Real-Time Image Processing (RTIP), 2010.  
A. Pande, P. Mohapatra and J. Zambreno, "Securing Multimedia Content using Joint Compression and Encryption ", IEEE MultiMedia, In Press.