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A. Pande and J. Zambreno, "Poly-DWT: Polymorphic Wavelet Hardware Support For Dynamic Image Compression", ACM Transactions on Embedded Computing Systems (TECS), vol. 11, no. 1, 2012.  
A. Pande and J. Zambreno, "Reconfigurable Hardware Implementation of a Modified Chaotic Filter Bank Scheme", International Journal of Embedded Systems (IJES), vol. 10, no. 3, pp. 248--258, 2010.  
A. Pande, J. Zambreno and P. Mohapatra, "Hardware Architecture for Simultaneous Arithmetic Coding and Encryption", Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), July, 2011.  
A. Pande and J. Zambreno, "Design and Hardware Implementation of a Chaotic Encryption Scheme for Real-Time Embedded Systems", Proceedings of the IEEE Signal Processing and Communications Conference (SPCOM), July, 2010.  
A. Pande and J. Zambreno, "An Efficient Hardware Architecture for Multimedia Encryption and Authentication using the Discrete Wavelet Transform", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 85-90, May, 2009.  
A. Pande, S. Chen, P. Mohapatra and J. Zambreno, "Hardware Architecture for Video Authentication using Sensor Pattern Noise", IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), vol. 24, no. 1, pp. 157-167, 2014.  
A. Pande, P. Mohapatra and J. Zambreno, "Securing Multimedia Content using Joint Compression and Encryption", IEEE MultiMedia, vol. 20, no. 4, pp. 50-61, 2013.  
A. Pande and J. Zambreno, "Efficient Mapping and Acceleration of AES on Custom Multi-Core Architectures", Concurrency and Computation: Practice and Experience, vol. 23, no. 4, pp. 372-389, 2011.  
A. Pande, P. Mohapatra and J. Zambreno, "Using Chaotic Maps for Encrypting Image and Video Content", Proceedings of the International Symposium on Multimedia (ISM), December, 2011.  
A. Pande, J. Zambreno and P. Mohapatra, "Joint Video Compression and Encryption using Arithmetic Coding and Chaos", Proceedings of the IEEE International Conference on Internet Multimedia Systems Architecture and Applications (IMSAA), December, 2010.  
A. Pande and J. Zambreno, "Efficient Translation of Algorithmic Kernels on Large-Scale Multi-Cores", Proceedings of the International Workshop on Reconfigurable and Multicore Embedded Systems (WoRMES), August, 2009.  
A. Pande and J. Zambreno, "Design and Analysis of Efficient Reconfigurable Wavelet Filters", Proceedings of the IEEE International Conference on Electro/Information Technology (EIT), May, 2008.  
A. Pande, J. Zambreno and P. Mohapatra, "Comments on 'Arithmetic Coding as a Non-Linear Dynamical System'", Communications in Nonlinear Science and Numerical Simulation (CNSNS), vol. 17, no. 12, pp. 4536-4543, 2012.  
A. Pande and J. Zambreno, "A Chaotic Encryption Scheme for Real-time Embedded Systems: Design and Implementation", Telecommunication Systems, vol. 52, no. 2, pp. 551-561, 2013.  
A. Pande and J. Zambreno, "The Secure Wavelet Transform", Springer Journal of Real-Time Image Processing (RTIP), 2010.  
A. Pande, J. Zambreno and P. Mohapatra, "Architectures for Simultaneous Coding and Encryption using Chaotic Maps", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2011.  
A. Pande and J. Zambreno, "A Reconfigurable Architecture for Secure Multimedia Delivery", Proceedings of the International Conference on VLSI Design (VLSID), January, 2010.  
A. Pande and J. Zambreno, "Polymorphic Wavelet Architectures using Reconfigurable Hardware", Proceedings of the International Conference on Field-Programmable Logic and its Applications (FPL), pp. 471-474, September, 2008.  
A. Pande and J. Zambreno, Embedded Multimedia Security Systems, , London, Springer-Verlag, pp. 146, 2013.