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K. Townsend and J. Zambreno, "A Multi-Phase Approach to Floating-Point Compression", Proceedings of the IEEE International Conference on Electro/Information Technology (EIT), May, 2015.  
K. Townsend, S. Sun, T. Johnson, O. Attia, P. Jones and J. Zambreno, "k-NN Text Classification using an FPGA-Based Sparse Matrix Vector Multiplication Accelerator", Proceedings of the IEEE International Conference on Electro/Information Technology (EIT), May, 2015.  
K. Townsend and J. Zambreno, "Reduce, Reuse, Recycle (R^3): a Design Methodology for Sparse Matrix Vector Multiplication on Reconfigurable Platforms", Proceedings of the International Conference on Application-specific Systems, Architectures and Processors (ASAP), June, 2013.  
K. Townsend, O. Attia, P. Jones and J. Zambreno, "A Scalable Unsegmented Multi-port Memory for FPGA-based Systems", International Journal of Reconfigurable Computing (IJRC), vol. 2015, December, 2015.  
K. Townsend, P. Jones and J. Zambreno, "A High Performance Systolic Architecture for k-NN Classification", Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE), October, 2014.