|Title||Design and Analysis of Efficient Reconfigurable Wavelet Filters|
|Publication Type||Conference Papers|
|Authors||A. Pande and J. Zambreno|
|Conference Name||Proceedings of the IEEE International Conference on Electro/Information Technology (EIT)|
Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power consumption. In this paper we discuss the design of reconﬁgurable wavelet ﬁlters for image processing applications that can meet such dynamic requirements. We generate several efﬁcient hardware designs based on a derived family of bi-orthogonal 9/7 ﬁlters. An efﬁcient folded and multiplier-free implementation of a 9/7 ﬁlter is obtained with the help of nine adders, which is a signiﬁcant improvement over other existing approaches. We also propose an architecture that allows for on-the-ﬂy switching between 9/7 and 5/3 ﬁlter structures. A performance comparison of these ﬁlters and their hardware requirements with other existing approaches demonstrates the suitability of our choice.