|Title||Preventing Integrated Circuit Piracy using Reconfigurable Logic Barriers|
|Publication Type||Journal Articles|
|Authors||A. Baumgarten, A. Tyagi and J. Zambreno|
|Journal||IEEE Design and Test of Computers|
Hardware metering to prevent IC piracy is a challenging and important problem. The authors propose a combinational locking scheme based on intelligent placement of the barriers throughout the design in which the objective is to maximize the effectiveness of the barriers and to minimize the overhead.