Joseph Zambreno (email, homepage) has been with the Department of Electrical and Computer Engineering at Iowa State University since 2006, where he is currently an Associate Professor. Prior to joining ISU he was at Northwestern University in Evanston, IL, where he graduated with his Ph.D. degree in Electrical and Computer Engineering in 2006, his M.S. degree in Electrical and Computer Engineering in 2002, and his B.S. degree summa cum laude in Computer Engineering in 2001. His research interests include computer architecture, compilers, embedded systems, reconfigurable computing, and hardware/software co-design, with a focus on run-time reconfigurable architectures and compiler techniques for software protection.

Phillip H. Jones (email, homepage) received his B.S. degree in 1999 and M.S. degree in 2002 in electrical engineering from the University of Illinois at Urbana-Champaign, and his Ph.D. degree in 2008 in computer engineering from Washington University in St. Louis. Currently, he is an Assistant Professor in the Department of Electrical and Computer Engineering at Iowa State University, Ames, where he has been since 2008. His research interests are in adaptive computing systems, reconfigurable hardware, embedded systems, and hardware architectures for application-specific acceleration.

Chad Nelson (email, homepage) is a graduate student pursuing an MS/PhD in Computer Engineering. He received his B.S. in Computer Engineering from Iowa State University in the Spring of 2010. His research interests include computer architecture, embedded systems, reconfigurable computing, and hardware / software codesign.

Sudhanshu Vyas (email) is a graduate student pursuing his PhD at Iowa State University. He joined ISU in the fall of 2009. Before joining, he received his B.E. degree from Birla Institute of Technology in Electronics and Communication Engineering in 2006 and worked at CG-CoreEl, an embedded systems company based in Bangalore. His research interests include reconfigurable architectures, embedded systems, control systems and FPGA fault tolerance..

Kevin Townsend (email, homepage) joined Iowa state as a PhD student in 2011. He received his BS in Computer Engineering at Purdue University. He is the current expert on the Convey Computer (HC-1) the RCL group uses. For the 2012 Memocode Competition, which Iowa State won, he wrote the Verilog and C++ to run on the HC-1 in 2 weeks. Kevin plans to continue to work with the HC-1 to enable "Big Data" related research.

Chetan Kumar N G (email, LinkedIn) is a PhD student in the Department of Electrical and Computer Engineering, where he is working with Prof. Phillip Jones. He completed his BS in Electronics and Communication at Visveswaraya Technological University, Bangalore, India in 2007. His research interests include embedded and real-time systems and hardware/software codesign. His current research focuses on developing techniques to improve predictability in execution of core system operations in real-time systems, using hardware-software codesign approaches.

Mihir Awatramani (email, LinkedIn) is a PhD student in the Department of Electrical and Computer Engineering, where he is working with Dr. Diane Rover and Dr. Joseph Zambreno. Before joining Iowa State in Fall 2010, he had completed his B.S in Electronics Engineering from K.J. Somaiya College of Engineering, Mumbai, India in 2009; and worked at Robosoft systems, a robotics company based in Mumbai. His research interests include computer architecture, SIMT architecture based embedded systems and system level performance optimization.

Xinying Wang (email) is a PhD student in the department of Electrical and Computer Engineering at Iowa State University. He joined ISU in the fall of 2009 and has been working with Dr. Zambreno since then. He received his Bachelor degrees in both Software Engineering and Communication Engineering from University of Electronic Science and Technology of China in 2008. Before joining ISU, he completed one year graduate school study in Computer System Architecture in UESTC. His research interests include reconfigurable architectures, embedded systems, parallel programming, and digital image processing.

Tyler Johnson (email, LinkedIn) is an MS student in the department of Electrical and Computer Engineering at Iowa State University. He received a BS in Computer Engineering from Iowa State University in the fall of 2012. Starting in the spring of 2013, he has been working in the RCL lab. His research interests include high-performance reconfigurable computing and computer security.

Ravi Yasa (email, LinkedIn) has been a MS student in the Department of Electrical and Computer Engineering in Iowa State University since Fall of 2010. Before joining ISU, he worked as a Manager - Integrated Electrical Maintenance at Tata Steel Ltd, India, Jamshedpur. Ravi has a BS in Electrical Engineering from the Indian Institute of Technology, Roorkee. His main research interests include multi-threaded architectures, GPU computing and reconfigurable computing.